module FourDigitLEDdriver (
    input  clk,
    input  reset,
    output an3,
    an2,
    an1,
    an0,
    output a,
    b,
    c,
    d,
    e,
    f,
    g,
    dp
);

  wire clk_fb, clk_slow_raw, clk_slow, locked;

  MMCME2_BASE #(
      .BANDWIDTH         ("OPTIMIZED"),
      .CLKIN1_PERIOD     (10.0),         // 100 MHz
      .DIVCLK_DIVIDE     (1),
      .CLKFBOUT_MULT_F   (6.0),          // VCO = 600 MHz
      .CLKOUT1_DIVIDE    (120),          // 600/120 = 5 MHz
      .CLKFBOUT_PHASE    (0.0),
      .CLKOUT1_PHASE     (0.0),
      .CLKOUT1_DUTY_CYCLE(0.5),
      .STARTUP_WAIT      ("FALSE")
  ) MMCME2_BASE_inst (
      .CLKIN1(clk),
      .CLKFBIN(clk_fb),
      .CLKFBOUT(clk_fb),
      .CLKOUT1(clk_slow_raw),
      .LOCKED(locked),
      .PWRDWN(1'b0),
      .RST(reset)
  );

  BUFG bufg_slow (
      .I(clk_slow_raw),
      .O(clk_slow)
  );

  wire rst_int = reset | ~locked;

  reg [3:0] state;
  always @(posedge clk_slow or posedge rst_int) begin
    if (rst_int) state <= 4'b1111;
    else state <= state - 1;  // one step per 200 ns
  end

  reg [3:0] an;
  reg [3:0] digit;

  always @(*) begin
    case (state)
      4'b1110: an = 4'b0111;
      4'b1010: an = 4'b1011;
      4'b0110: an = 4'b1101;
      4'b0010: an = 4'b1110;
      default: an = 4'b1111;
    endcase
  end

  always @(*) begin
    case (state)
      4'b0000, 4'b1111, 4'b1110, 4'b1101: digit = 4'h0;
      4'b1100, 4'b1011, 4'b1010, 4'b1001: digit = 4'h1;
      4'b1000, 4'b0111, 4'b0110, 4'b0101: digit = 4'h2;
      default: digit = 4'h3;
    endcase
  end

  wire [6:0] LED;
  LEDdecoder LEDdecoder_inst (
      .char(digit),
      .LED (LED)
  );

  assign {an3, an2, an1, an0} = an;
  assign a = ~LED[6];
  assign b = ~LED[5];
  assign c = ~LED[4];
  assign d = ~LED[3];
  assign e = ~LED[2];
  assign f = ~LED[1];
  assign g = ~LED[0];
  assign dp = 1'b1;

endmodule