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dsl
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Kostas Drakontidis
3863bfbecd
refactor & add tbs
2026-11-04 12:50:44 +02:00
lab1
refactor & add tbs
2026-11-04 12:50:44 +02:00
.gitignore
Initial commit
2026-11-04 11:32:14 +02:00
README.md
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2026-11-04 11:30:26 +02:00
README.md
dsl
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Readme
39
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Languages
Verilog
85.7%
Tcl
14.3%